1. Field of the Invention
The present invention relates to a solid-state imaging device including a CMOS image sensor as a representative example and a camera system.
2. Description of the Related Art
Recently, CMOS imagers have been widely used in digital still cameras, camcorders, surveillance cameras, and the like, and the market thereof has also expanded.
A CMOS imager is configured to convert light, which is incident to each pixel, into electrons by using a photodiode as a photoelectric conversion device, accumulate them for a predetermined period of time, then digitalize a signal corresponding to the amount of accumulated charges, and output the signal to the outside.
Generally, each pixel circuit of the CMOS imager converts the electric charge signal, which is sent from the photodiode, into an electric potential signal of the vertical signal line through the source follower, which is built in the pixel circuit, so as to output the signal.
The selection for each pixel at the time of the reading is sequentially executed on a row-by-row basis, and the pixel signal of each column at the selected row is subjected to analog digital (AD) conversion in series or in parallel, and is output as the imaging data.
Particularly, in recent years, there has been an increase in the number of cases of having an AD converter for each column and concurrently performing conversion in order to achieve an increase in speed. An example of the related art is disclosed in JP-A-2008-136042.
As described above, in the AD conversion performed for each column at the same time, generally, the following method has been used.
Specifically, the output of the signal line for each column is determined by concurrently comparing with a common reference signal, which changes with a regular slope, through a comparison/determination unit which is provided for each column.
On the basis of the timing at which a previously-defined relationship is satisfied between the output signal and the reference signal, each output signal is converted into digital data.
For example, in the digitalization, a counter circuit for counting up a stored value in synchronization with the displacement of the reference potential is used. Thus, when the previously-defined relationship is satisfied between the reference potential and the signal potential, the counter value is latched for each column, and is employed as a digitalized signal. Another example of the related art is disclosed in JP-T-2008-124842.